It is known from the related art that both a master computer and a slave computer can be connected to a shared data bus. In such a hardware constellation the two computers must generally be configurable with different reset configurations, which hereinafter will be referred to as master-reset configuration and slave-reset configuration, respectively. As a rule, the two computers have internal memories via which internal standard reset configurations can be called up. However, due to the mentioned hardware constellation, it is possible that the internal reset configuration cannot be utilized in any of the two computers, or at least in the slave computer. This will then have the disadvantage that a shared operation of both master computer and slave computer on the shared data bus is impossible.